Major Takeaways from RISCV NA Summit 2025

1. The Software Ecosystem is Now the Core Focus

The most significant shift was the overwhelming emphasis on software, tools, and developer experience.

• Platform Mindset: Keynote speakers, including executives from major players, stressed the need to view RISC-V not just as an ISA (Instruction Set Architecture) but as an ecosystem that requires platform-level thinking. The message was clear: no single company can build the entire software stack alone; continued, sustained community collaboration is essential for scaling.

• "Paved Road" for Datacenters: Google highlighted its efforts in creating a "paved road" for RISC-V adoption, including using AI-driven tooling to automate the complex process of porting their software stack from proprietary architectures to RISC-V. This signals that major hyperscalers are actively engineering solutions to remove friction for developers.

  
  

2. High-Performance Computing & AI Get a Massive Boost

RISC-V's expansion into high-end compute was the major theme, driven by announcements from key hardware and software vendors.

• Data Center and Chiplet Traction: Companies showcased their progress with "real silicon, real systems," emphasizing their full-stack approach to high-performance RISC-V for data center and automotive platforms, often using advanced chiplet-based designs.

  
  

3. The Rise of Vertical-Specific Dominance

The Summit showcased clear evidence of RISC-V achieving market dominance in specific vertical industries beyond its traditional embedded roots.

• Aerospace & Defense: NASA's presence and keynotes highlighted the critical role of RISC-V in the High Performance Spaceflight Computing (HPSC) initiative, with radiation-hardened Microchip processors (using SiFive cores) becoming the standard for next-generation space missions.

• Security & Sovereignty: Keynotes explored the convergence of RISC-V with modern cryptography and blockchain technologies, demonstrating its potential to power the next wave of secure, decentralized systems and enhance technological sovereignty for nations and enterprises.

  
  

4. Standardization Efforts Mature (RVA23 and Beyond)

Technical standardization gained clarity, providing a more stable target for both hardware and software development.

• RVA23 Stability: The focus was on the recently ratified RVA23 Profile (RISC-V Application Profile 2023), which provides a stable baseline for application-class processors. The community signaled a move toward incremental updates (like RVA23p1, RVA23p2) rather than annual major releases, which helps stabilize the software ecosystem.

• Developer Training: The addition of an official, separately ticketed Developer Workshop track and a RISC-V 101 track showed the community's commitment to aggressively onboarding new talent and accelerating the application of the open standard.

  
  

5. New Open-Source Development Programs

A major announcement focused on making RISC-V hardware and software more accessible to the global open-source community:

• DeepComputing's Global RISC-V Support Programs: DeepComputing launched a major initiative designed to accelerate open innovation by providing hardware and ecosystem support to three key areas:

  • "100 Open Source Projects" Program: This is specifically designed to support open-source communities with RISC-V hardware (like the DC-ROMA AI PC), testing environments, and collaboration opportunities to drive upstream contributions to the RISC-V software stack.

  • The initiative also includes "100 Schools & Universities" and "100 AI Startups" programs, broadening the use of open RISC-V platforms.

The Scaleway Labs Elastic Metal RV1 (EM-RV1) is a notable open-source platform, primarily because it's the world's first dedicated RISC-V server offering in the cloud.¹

Scaleway, a European cloud provider, launched this offering in early 2024 as part of their Scaleway Labs to enable developers and companies to easily test and develop on the RISC-V architecture.

While it wasn't launched at the RISC-V Summit North America 2025 (as its launch date was earlier), it represents a major milestone for the open-source ecosystem, providing essential cloud infrastructure for RISC-V software development, and was certainly a topic of discussion at the summit.

Key Specifications and Open-Source Relevance

Feature	Details	Open-Source Relevance
Type	Bare Metal (Dedicated) Server in the Cloud	Full control of the RISC-V hardware, ideal for kernel development and low-level testing.
SoC	Alibaba T-Head TH1520	Utilizes an open-source-friendly processor with an RISC-V core.
CPU	4x T-Head C910 RISC-V 64GC cores @ 1.85 GHz	Provides a modern, multi-core RISC-V development environment.
RAM	16 GB LPDDR4	Sufficient memory for building and testing complex applications.
Storage	128 GB eMMC	Basic storage, consistent with its use as an affordable development/CI/CD platform.
Operating Systems	Debian, Ubuntu, Alpine Linux	Support for major open-source Linux distributions, highlighting software ecosystem maturity.
AI Capabilities	Integrated NPU (4 TOPS @ INT8)	Allows for testing and development of AI/ML workloads on the RISC-V architecture using open-source frameworks like TensorFlow and ONNX.
Design	Designed and assembled in-house in Paris (Scaleway Labs)	A commitment to technological independence and fostering the European RISC-V supply chain.

The ISCAS RUyiBook (or Ruyi Book) is a RISC-V-based laptop, developed through a collaboration that includes the Institute of Software at the Chinese Academy of Sciences (ISCAS), Milk-V, and Inchi.

It is a significant project in the open-source hardware and software community, aiming to create a fully functional, mainstream-capable computing platform based on the open-standard RISC-V Instruction Set Architecture (ISA).

Key Features and Specifications

The RuyiBook is an effort to demonstrate the maturity of the RISC-V ecosystem for general-purpose computing.

Component	Details	Significance
Processor (SoC)	XiangShan Nanhu (second-generation)	An impressive high-performance, open-source RISC-V chip design.
CPU Clock	Up to 2.5 GHz	This clock speed pushes RISC-V toward performance parity with established x86 and ARM architectures for mainstream tasks.
Memory	8GB DDR5	Utilizes modern, high-speed memory for better system performance.
Graphics	AMD RX 550 (Discrete GPU)	Uses a closed-source but powerful discrete GPU to handle modern graphical workloads and external displays up to 4K resolution.
Operating System	Primarily runs openEuler OS (with EulixOS 2.0-RV/PolyOS 2.0-RV desktop options)	Showcases a full, streamlined RISC-V software stack, from the bottom-layer processor to large-scale office software like LibreOffice.
Goal	Technological Independence	Part of a broader effort in China to reduce reliance on proprietary foreign technologies (like x86 and ARM) by leveraging the open and royalty-free nature of RISC-V.

6. The QiLai SoC Chip

The heart of the platform is the QiLai System-on-Chip (SoC), which is a test chip manufactured on TSMC's advanced 7nm process technology. It features a heterogeneous computing architecture, combining two different types of high-performance Andes RISC-V cores:

Component	Description	Target Application
Main CPU Cluster (AX45MP)	A quad-core cluster of RV64GC 64-bit processors. It has an 8-stage superscalar pipeline, a Memory Management Unit (MMU), and a 2MB Level-2 cache with a coherence manager.	Running rich operating systems like Linux (including a Linux SMP system) and general-purpose application processing.
Vector Processor (NX27V)	A dedicated RV64 GCV 64-bit vector processor with a streamlined 5-stage scalar pipeline and a large data cache. It features a 512-bit vector length (VLEN) and data path width (DLEN).	High-throughput data processing and acceleration for AI/ML workloads.
Performance	The AX45MP can run up to 2.2 GHz, and the NX27V up to 1.5 GHz.	The entire SoC has a low power consumption of approximately 5W at full speed.

7. The Voyager Development Board

The QiLai SoC is integrated onto the Voyager Development Platform, a Micro-ATX form factor motherboard. This board provides a full PC-like environment for developers, including:

• System Memory: Support for up to 16GB of external DDR4 memory.

• Storage: M.2 NVMe SSD support and MicroSD card socket.

• Expansion: Multiple PCIe Gen4 slots (x16, x4) for integrating peripherals like external GPUs, SSDs, and AI accelerator cards.

8. Target Applications and Ecosystem

The QiLai Platform is a crucial step in maturing the RISC-V ecosystem for high-end computing. Its target applications include:

• AI/ML and Edge AI: The heterogeneous architecture allows the AX45MP to run the main OS while the NX27V is dedicated to accelerating machine learning inference and training.

• High-Performance Computing: General-purpose computing, augmented reality (AR), virtual reality (VR), and multimedia processing.

• RISC-V PC Development: The platform is the foundation for collaborative projects, such as the effort with DeepComputing to develop the "World's First RISC-V AI PC" running Ubuntu Desktop.

The platform is supported by a full software stack, including the OpenSUSE Linux distribution, Andes' toolchains (AndeSight), and their dedicated AI/ML SDK (AndesAIRE NN SDK).

The SiFive HiFive Unmatched is a high-performance RISC-V development platform designed by SiFive to facilitate the creation and porting of software for RISC-V-based desktop and server applications.

It is notable for being one of the first RISC-V development boards to adopt a standard PC form factor, making it much easier to integrate into a standard computer enclosure with common peripherals.

Key Features and Specifications

Component	Detail
SoC	SiFive Freedom U740 (FU740)
CPU Architecture	Heterogeneous Multi-core: A cluster of five 64-bit RISC-V cores.
Cores	Quad-core SiFive U74-MC (U-series are Linux-capable application cores) and Single SiFive S7 (S-series is a real-time monitor core for auxiliary/deterministic tasks).
Core ISA	RV64GC ($\text{RV64IMAFDC}$) for the U74 cores, RV64IMAC for the S7 core.
Frequency	Up to 1.2 GHz (initial releases), with later revisions capable of higher speeds.
Cache	2MB Coherent Banked L2-Cache, plus L1 caches per core.
Form Factor	Mini-ITX ($170 \text{ mm} \times 170 \text{ mm}$), enabling use with standard PC cases.
System Memory	16 GB of 64-bit DDR4 DRAM.
Expansion Slots	1x PCI Express Gen 3 x16 connector (with 8 lanes useable) for graphics cards or accelerators.
Storage	1x M.2 M-Key (PCIe Gen 3 x4) for NVMe SSD.
Connectivity	Gigabit Ethernet (10/100/1000 Mbps), 4x USB 3.2 Gen 1 Type-A ports, M.2 E-Key for Wi-Fi/Bluetooth.
Power	Standard 24-pin ATX power connector.
Software	Ships with a bootable SD card containing the Freedom U-SDK (based on Yocto/OpenEmbedded Linux), OpenSBI, and U-Boot. It is supported by various Linux distributions like Debian and openSUSE.