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Top CPU Performance Benchmarking Toolkits You Should Know
Modern compute platforms - from cloud hyperscale CPUs to edge processors - deliver unprecedented parallelism and instruction-set capabilities. But to truly understand performance, you need the right benchmarking tools. Whether you're comparing cloud instances, evaluating Arm-based servers like Ampere , or validating x86, RISC-V, or AI-accelerated hardware, the ecosystem offers several battle-tested frameworks. In this blog, we explore the most widely-used CPU benchmarking too

Rajeev Gadgil
Nov 32 min read
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Major Takeaways from RISCV NA Summit 2025
1. The Software Ecosystem is Now the Core Focus The most significant shift was the overwhelming emphasis on software, tools, and developer experience. Platform Mindset: Keynote speakers, including executives from major players, stressed the need to view RISC-V not just as an ISA (Instruction Set Architecture) but as an ecosystem that requires platform-level thinking. The message was clear: no single company can build the entire software stack alone; continued, sustained commu

Anup Halarnkar
Oct 276 min read
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Debugging the Debugger: A Deep Dive into GDB and RISC-V
In the world of software development, the GNU Debugger (GDB) is an essential tool for programmers. It allows us to peer inside a running program, find bugs, and understand complex code. As new hardware architectures emerge, it's crucial that our tools keep pace. One such rising star is RISC-V, an open-source instruction set architecture that is rapidly gaining popularity, particularly with its new vector extensions for high-performance computing. The Challenge: An Unknown Ins
Soham Gargote
Oct 132 min read
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Cross-Compiling SPEC CPU2017 for RISC-V (RV64): A Practical Guide
SPEC CPU2017 is a well-known benchmark suite for evaluating CPU-intensive performance. Although it assumes native compilation and execution, there are cases—especially with RISC-V (RV64) platforms—where cross-compilation is the only feasible route. This guide walks through the steps to cross-compile SPEC CPU2017 for RISC-V, transfer the binaries to a target system, and optionally use the --fake option to simulate runs where execution isn't possible or needed during develop

Rajeev Gadgil
May 123 min read
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YOLOX on RISC-V QEMU
Goal of this project: This project aims to determine RISC-V's readiness for running YOLOX for the latest edge requirements. Target Application: Running YOLOX on RISC-V QEMU involves setting up a RISC-V virtual machine and then configuring the necessary environment to compile and run YOLOX. Please note that this is a complex process, and it's essential to have prior experience with virtualization and RISC-V development. From the RISCV website, this is a blog ( https://riscv.or

Sameer Natu
Sep 19, 20233 min read
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Bring up Yocto for RISC-V deployment
We at Whileone Techsoft pvt ltd understood the requirements of our customer who wanted to have a basic Yocto based RiscV deployment for their custom SoC chip. The customer intended to share this basic deployment with their clients who wished to make use of our customer’s SoC in their products. Our customer was unaware of Yocto and what was needed to ensure a favorable deployment. They had their own custom patched Linux kernel, Root file system, Toolchain and custom Bootloade

Anup Halarnkar
Jun 14, 20233 min read
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