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Decoding SPECpower_ssj2008
In the world of enterprise IT, raw computing performance used to be the only metric that mattered. If a server crashed through complex tasks, nobody cared how much electricity it burned or how hot the room got. That mindset shifted dramatically in December 2007 when the Standard Performance Evaluation Corporation (SPEC) released SPECpower_ssj2008, the first industry-standard benchmark designed to evaluate both performance and power consumption across varying workload levels.

Rajeev Gadgil
Jul 274 min read


Tuning for SPEC CPU 2017 Performance Optimization
Industry-standard benchmarks play a critical role in evaluating and comparing server performance across different processor architectures, operating systems, and hardware platforms. Among these benchmarks, SPEC CPU 2017 is widely recognized for measuring compute-intensive performance using a diverse collection of integer and floating-point workloads that represent real-world applications such as artificial intelligence, simulation, image processing, and data analytics. As org

Sharvari Gogate
Jul 144 min read


Our Site Reliability Engineering Playbook: Chaos Engineering, SLOs, and Automated RCA
Most engineering teams find out their system is broken when a customer tweets about it at 2 AM. We find out before the customer ever notices. And when something does go wrong, we know the root cause in under three minutes, not three hours. Here's what we actually do, and why it matters more than most people realize. Site Reliability Engineering Isn't Just Dashboards and On-Call Rotations There's a widespread misconception that Site Reliability Engineering is glorified sysadmi

Akshay Bhide
Jun 294 min read


Choosing the Right Cloud Expense Management Tools
Managing cloud expenses effectively is no longer just a finance problem; it’s an operational necessity. As cloud adoption scales, tracking and optimizing costs across distributed engineering teams becomes incredibly complex. Selecting the right cloud expense management tool helps organizations gain visibility, curb runaway spend, and maximize their infrastructure investments. But with dozens of platforms on the market, how do you separate high-level dashboards from tools that

Nandita Gadgil
Jun 154 min read


ResNet50 Performance Study
using PyTorch on ARM and x86 CPUs CPU Inference Benchmarking · ARM vs x86 · W8A8 Quantization Overview ResNet50 is a convolutional neural network built using bottleneck residual blocks of the form: 1×1 Conv → 3×3 Conv → 1×1 Conv + Skip Connection Among these layers, the 3×3 convolution layers dominate execution time, making Conv2d the primary hotspot during inference. Although ResNet50 performs ~4 GFLOPs per inference, it is not compute-heavy enough to fully utilize moder

Archana Barve
Jun 13 min read


Measuring the Unmeasurable: A Benchmarker's Guide to Agentic AI
For decades, AI benchmarks lived in comfortable isolation. A model answered a question, we checked the answer, we assigned a score. Agentic AI broke that contract. When a model can browse the web, write and execute code, call external APIs, and chain its own decisions across hundreds of steps, a single accuracy number tells you almost nothing about whether the system is actually trustworthy. Evaluating an agent is less like grading an exam and more like auditing a junior empl

Rajeev Gadgil
May 186 min read


AIML Classifier - Log Analyzer
Objective Building an AI-powered system that automatically identifies and classifies software errors into meaningful categories, and provides root cause analysis and recommendations. Challenge Solution Developed multiple machine learning models to classify errors within seconds Integrated retrieval-augmented generation (RAG) for Root cause analysis Used Large language Models (LLMs) for providing narratives and recommendations Benefits

Radhika Godbole
May 41 min read


AI assistant for Beaglebone using LLM
Introduction For this project, I have used llama.cpp as the local inference engine and TinyLlama-1.1B-Chat-v1.0 as the language model. llama.cpp is a lightweight C/C++ inference framework designed to run LLMs locally with minimal setup across CPUs and GPUs. It is well suited for embedded and edge-oriented workflows because it supports efficient local execution without depending on cloud APIs. The TinyLlama model used here is the chat-tuned 1.1B parameter variant published on

Anup Halarnkar
Mar 233 min read


Beyond the Bill: Why Performance Benchmarking is the Secret to Sustainable Cloud Savings
Introduction In our previous post, How CloudNudge Can Help You Optimize and Manage Your Cloud Expenses, we discussed how visibility is the first step toward financial control. However, for software and hardware engineers, a low cloud bill is a hollow victory if it comes at the cost of system latency. Saving money is great. Saving money without breaking your application is Performance Engineering. The Performance-Cost Paradox The most common mistake in cloud optimization is "B

Nandita Gadgil
Mar 102 min read


Boost Software Efficiency with Software Performance Optimization
Software efficiency is more critical than ever. Users expect applications to be fast, reliable, and scalable. Achieving this requires more than just writing clean code; it demands a strategic approach known as software performance optimization. This process ensures that software not only meets functional requirements but also performs optimally under various conditions. By focusing on performance engineering, businesses can deliver superior user experiences, reduce operationa

Archana Barve
Feb 233 min read


Chaos Engineering in the Production Stack
Chaos Engineering: Enhancing System Resilience Chaos engineering is the discipline of intentionally introducing controlled faults to validate system resilience. In any production ecosystem, spanning silicon validation, system integration, and software stacks, it helps uncover performance, reliability, and scalability risks long before production deployment. Understanding Kubernetes Pods Modern validation and benchmarking workloads increasingly run on Kubernetes. Pods, the sma

Rajeev Gadgil
Feb 92 min read


Stop Starting, Start Resuming: Quickly starting dockers
Cold starting docker containers is expensive. Before a Dockerized application does anything useful, it pulls images, initializes the runtime, loads classes or modules, allocates memory, opens files and sockets, and slowly warms into a steady operating state. In modern infrastructure, this cost shows up everywhere: pod restarts, scale-outs, rollouts, autoscaling events. Each time, the same warm-up work is paid for again. Capture and restore offers a different idea: instead of

Ojas Natu
Jan 272 min read


The Evolution of Software Performance with Agentic AI
Discover how agentic AI is flipping the performance engineering paradigm. Learn how to evolve from a "loop tuner" to a "constraints governor" with our checklist for AI-proof SLOs.

Rajeev Gadgil
Jan 122 min read


From Innovation to Impact: Aligning ER&D with Marketing and Sales
Engineering R&D in a Changing Landscape Engineering Research and Development has always been at the heart of innovation. But today, its role is evolving rapidly. What was once primarily about pushing technical boundaries is now equally about speed, efficiency, and alignment with business outcomes. As industries grow more complex and interconnected, Engineering R&D teams are being asked to deliver faster, smarter, and with fewer margins for error. From a marketing and sales po

Shruti Gadgil
Dec 29, 20253 min read


RISC-V: Accelerating Software Readiness for Numerical Computing
Introduction to RISC-V and Software Readiness As RISC-V expands into accelerator domains, software readiness becomes as critical as hardware innovation. This work focuses on implementing a set of mathematical and BLAS primitives for a custom RISC-V architecture. These primitives form foundational building blocks for numerical computing. The implementation includes vector and matrix operations, with careful attention to numerical correctness and floating-point behavior. Overco

Anup Halarnkar
Dec 22, 20252 min read


QEMU vs. FPGA: Understanding the Differences in Emulating and Prototyping Any ISA
With the evolution of hardware design and development, two tools have become fundamental for those working on Instruction Set Architectures (ISA) QEMU and FPGA boards. Although both serve as key resources for developing, testing, and experimenting with different ISAs (such as RISC-V, ARM, x86, etc.), they operate in significantly different ways. This blog highlights the key distinctions between QEMU and FPGA boards and their use cases across various architectures. Key Featur

Sayali Tamane
Dec 8, 20253 min read


Network Latency Study in OCI Cloud
Network testing tools such as netperf can perform latency tests plus throughput tests and more. In netperf, the TCP_RR and UDP_RR (RR=request-response) tests report round-trip latency. With the -o flag, output metrics can be customized to display the exact information. Here’s an example of using the test-specific -o flag so netperf outputs several latency statistics: Google has lots of practical experience in latency benchmarking and as per blog using-netperf-and-ping-to-mea

Archana Barve
Dec 1, 20254 min read


Understanding DLRM with PyTorch
DLRM stands for Deep Learning Recommendation Model. It is a neural network architecture developed by Facebook AI (Meta) for large-scale personalized recommendation systems. DLRM is widely used in real-world applications where personalized recommendations or ranking predictions are needed. DLRM designed for click-through rate (CTR) prediction and ranking task. Examples: Online Advertising, E-commerce Recommendations, Social Media Feed Ranking, Streaming Services, Online Marke

Mrinal Kshirsagar
Nov 24, 20252 min read


Top CPU Performance Benchmarking Toolkits You Should Know
Modern compute platforms - from cloud hyperscale CPUs to edge processors - deliver unprecedented parallelism and instruction-set capabilities. But to truly understand performance, you need the right benchmarking tools. Whether you're comparing cloud instances, evaluating Arm-based servers like Ampere, or validating x86, RISC-V, or AI-accelerated hardware, the ecosystem offers several battle-tested frameworks. In this blog, we explore the most widely-used CPU benchmarking tool

Rajeev Gadgil
Nov 3, 20252 min read


Major Takeaways from RISCV NA Summit 2025
1. The Software Ecosystem is Now the Core Focus The most significant shift was the overwhelming emphasis on software, tools, and developer experience. Platform Mindset: Keynote speakers, including executives from major players, stressed the need to view RISC-V not just as an ISA (Instruction Set Architecture) but as an ecosystem that requires platform-level thinking. The message was clear: no single company can build the entire software stack alone; continued, sustained commu

Anup Halarnkar
Oct 27, 20256 min read
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